Electrical Engineering at the University of Waterloo. Bare-metal and RTOS firmware for ARM Cortex-M, digital design in SystemVerilog, and agentic-AI systems — built to a standard where the claims are measured rather than asserted.
Available for Winter 2027 co-op·11 January – 30 April 2027·firmware, hardware, or silicon
Every figure on this page is measured unless it is marked otherwise
The through-line
One network. Three machines. One reference.
The same int8 convolutional network runs on a bare-metal Cortex-M4F, a SystemVerilog systolic array and a CUDA GPU. A pure-integer model is the arbiter, and the acceptance criterion is not “close enough” but exact int32 equality. One machine is proven; two are in build.
Golden reference
A pure-integer NumPy model of the network. No floats, no tolerance.
Every machine below must reproduce its int32 outputs exactly.
In build. RTL skeletons written; co-simulation harness and golden vectors in place.
16×8 int8 MAC array with gemmlowp-style requantisation
Verilator co-simulation against the same reference the firmware matches
Guided build: ten blocks, each ending in a test that passes or does not
GPU
in build
NVIDIA · CUDA
CUDA C++
Target: batched throughput, zero changed bits
In build. Integer reference and CPU baseline agree bit-exactly; kernels next.
Batched int8 inference, optimised one measured step at a time
Every optimisation must leave the output bits untouched
Eight written lessons on GPU execution, memory and honest measurement
Writing the same arithmetic three times is not the interesting part. Being able to prove the three agree, bit for bit, against a reference that admits no tolerance — that is the part worth doing, and it is the standard the rest of this page is held to as well.
Selected work
Things I built, and what they measured.
Firmware, silicon, and the systems around them. Every figure is copied from that project's own results and is measured on real data, unless it carries an amber mark reading estimated or target.
Cardia
Real-time ECG arrhythmia classification on a bare-metal Cortex-M4F
An AD8232 analog front end feeds an STM32F446RE sampling at exactly 360 Hz. Register-level ADC and DMA double-buffering, cascaded IIR filters, Pan-Tompkins QRS detection and an int8 convolutional network classify every heartbeat into the five ANSI/AAMI EC57 classes — with no vendor HAL, no RTOS and no dynamic allocation anywhere in the image.
Nearly every MIT-BIH project reports 98–99% by shuffling beats from the same patient across the train/test split, so the model learns the patient rather than the arrhythmia. Cardia is evaluated inter-patient — trained on 22 people, tested on 22 different people — which is why the number below is 92.85% and not 99%. The intra-patient model is trained too, deliberately, so the gap is measured rather than asserted.
Production-style FreeRTOS firmware that acquires data from I²C and SPI sensors, persists it to on-board SPI NOR flash through a crash-tolerant append-only log, streams it as a CRC-framed binary protocol over UART, and exposes an interactive command shell — five cooperating RTOS tasks with an independent watchdog and ADC+DMA supply monitoring.
The portable logic is deliberately HAL-free so it compiles and runs under a host test suite: the flash log's wrap-around and remount paths are tested, and the BME280 compensation is pinned to datasheet golden vectors.
167
host-test checks across 6 suites
39.7 KB
flash, 44.7 KB RAM
5
protocols on one MCU
-Wall -Wextra
clean
CFreeRTOSSTM32F411RESPI NOR flashUARTADC+DMA
Ringback
AI missed-call recovery for small service businesses
A plumber under a sink cannot answer the phone, and the homeowner with a leak does not leave a voicemail — they hang up and call the next result. Ringback texts that caller back within seconds, works out what the job is, answers from the business's own material, books it, and sends the owner a structured lead.
Most of the engineering is in what the model is not allowed to do: nine explicit states with a declared transition table, a two-step booking handshake that refuses to confirm a slot it never offered, and STOP/HELP/emergency handling that runs before any inference — because compliance must not depend on a sampled token.
54 / 54
eval scenarios, 186 assertions
108
tests passing
~$0.011
per recovered conversation
estimated
TypeScriptNext.jsLLM tool-usestate machineevals
Systole
A 16×8 int8 convolution accelerator in SystemVerilog
in build
Cardia's convolutions implemented in hardware: a 16×8 MAC array with gemmlowp-style requantisation, co-simulated in Verilator against the same pure-integer reference the firmware already matches.
The requirement is exact agreement on every output activation, not an approximation within tolerance. Built as a guided ten-block exercise so every part is one I can derive again from scratch.
bit-exact
the acceptance criterion
SystemVerilogVerilatorYosysMake
Plexus
Batched int8 CNN inference on a GPU, bit-exact against a Cortex-M4F
in build
The same network again, this time on CUDA, made fast one measured optimisation at a time without ever changing an output bit. Three machines, one golden reference, exact int32 equality at every step.
The integer reference and CPU baseline already agree bit-exactly; the kernels are the build. Eight written lessons cover the execution model, the memory hierarchy, quantisation and honest measurement — because the expensive mistake in this field is optimising something that was never the bottleneck.
zero changed bits
the acceptance criterion
CUDA C++PythonNumPy
Self-Balancing Robot
FreeRTOS control system with IMU sensor fusion
PID motor control at 1 kHz on an STM32F446RE with IMU sensor fusion and encoder feedback, UART telemetry, and a CAN interface for expansion, on a custom multi-rail power board.
STM32F446REFreeRTOSCIMU
Autonomous Robot
TurtleBot4 navigation with LiDAR and YOLOv5
Led a four-person team building autonomous navigation on a TurtleBot4 using LiDAR and YOLOv5 object detection, reaching 80% accurate object avoidance with real-time ROS visualisation.
Temperature and humidity tracking at 95% sensor accuracy with an LCD interface that cut user input time 30%, in a 3D casing designed in AutoCAD Inventor.
CC resistors, ESD/TVS and polyfuse protection, with full fab output (Gerber, BOM, CPL) validated through ERC/DRC, trace-current simulation and 3D review.
KiCadAltium
Traffic Light Controller
Moore FSM in VHDL on FPGA
A three-way intersection controller with timers, synchronisers and holding registers, verified in ModelSim and deployed to an FPGA through Quartus Prime.
VHDLModelSimQuartus Prime
Morse Code Transmitter
Bare-metal RISC-V assembly
LEDs driven straight through GPIO register writes with 500 ms timing loops, manual stack management, register-based parameter passing and a 16-bit Morse lookup table.
RISC-V assemblyGPIO
ThermOS
LM75BD driver and over-temperature interrupt handling
Driver functions for the LM75BD temperature sensor over I²C, with an OS interrupt handler for over-temperature shutdown events.
A design system, and the living showcase that documents it
OKLCH three-tier tokens, fluid type and space scales, a four-layer control anatomy and a tokenised motion system. The showcase renders live components rather than screenshots, so a token change breaks the documentation loudly instead of letting it go stale.
An installable day-planning app: block the day, track what actually happened against it, and review the week without the tool making you feel bad about the gap.
An 11-route Next.js and Supabase app covering tasks, calendar, habits and insights: fully offline with realtime sync, row-level security, auth and Web Push reminders.
Four employers and a design team, in reverse order.
Software Engineer
Stealth
Aram Labs·May 2026 – Present
Build agentic AI products for clients end to end: LLM tool-use workflows, integrations, and delivery.
Operations & Automation
Hauser Industries·Jan 2026 – Apr 2026·Waterloo, ON
Delivered 20+ automation, reporting, ERP, and e-commerce improvements in a 4-month term, removing ~30 hours of manual work per week by building internal tools across NetSuite, Shopify, CSV workflows, and operational systems.
Developed 3 product-configuration calculators (terrace planters, pergolas, timber benches), standardizing quotation calculations and cutting quote preparation time by 50%+.
Automated 4 Shopify catalog workflows handling ~50 items weekly, and implemented 5+ NetSuite enhancements including custom modules, drawing lookup, and PO conversion.
Created 6+ operational and commercial reports covering shipping, margins, inventory, sales, and rejected items, improving visibility into performance and product availability.
Operational Systems Engineer
Toronto Business Development Centre·May 2025 – Aug 2025·Toronto, ON
Led AI-driven systems transformation, integrating OpenAI and automation APIs into Airtable and Zoho to enable dynamic data entry and workflow generation across 3 departments.
Automated company-wide CRM processes with custom AI scripts and data pipelines, reducing manual input ~30% on 1,000+ records.
Delivered web and mobile application features by coordinating cross-functional development across Supabase, React, and Tailwind stacks.
Data & Systems Intern
Toronto Business Development Centre·Sep 2024 – Dec 2024·Toronto, ON
Built internal automation with Make, AppScript, and AI-assisted workflows, improving data transfer and validation between Airtable and Zoho by 80%.
Prototyped low-code dashboards and AI-assisted reporting, cutting manual analysis time ~25%.
Kept CRM, Airtable, and Google Sheets datasets accurate and analysis-ready, supporting operations and survey analysis across 15+ program events.
Electrical Member
University of Waterloo Baja SAE·May 2024 – Jul 2024·Waterloo, ON
Calibrated an ADXL345 accelerometer with Arduino/C++ drivers, improving acceleration-data accuracy ~15%.
Integrated 3 electrical subsystems (brake lights, pneumatic switches, and differential switches) with the vehicle battery system for reliability and safety.
Toolkit
What I reach for.
Listed because I have used it on something that worked, not because I have read about it.
Looking for firmware, hardware, or silicon roles for the 11 January – 30 April 2027 term. Based in Waterloo & Toronto, ON. The fastest way to reach me is email.